The invention relates generally to the use of partially defective memory devices and, in particular, to the use of partially defective random access memory (RAM) devices.
Not all applications that use computer memory devices require those devices to provide absolute store-and-retrieve fidelity. For example, applications such as telephone answering machines, some video storage devices, and toys may use memory devices that have one or more non-functional memory locations. Systems such as these may use a memory interface device to identify and map out those blocks of memory having one or more defective locations. Referring to FIG. 1, a system 100 capable of using partially defective memory 102 may also include application 104 (e.g., an audio or video storage application), interface 106 through which application 104 communicates with memory 102, and input-output (I/O) unit 108 through which application 104 communicates with external units or users.
In one prior art technique, interface 106 may generate a table whose entries identify blocks within memory 102 that have one or more defective locations. A block of memory may be a specified number of memory locations, for example, 256 bits, 64 nibbles, 128 bytes, or 64 words. Referring to FIG. 2, interface 106 may write a known pattern (e.g., the zero value) to every location in memory 102 (at 200). Next, a block of memory 102 may be read (at 202) and inspected (at 204). If every location retrieved at 202 reflects the pattern written at 200 (the xe2x80x98yesxe2x80x99 prong at 204), a table entry is generated that identifies the block of memory as valid (at 206). If every location retrieved at 202 does not match the pattern written at 200 (the xe2x80x98noxe2x80x99 prong at 204), a table entry is generated that identifies the entire block of memory as invalid (at 208). If, after creating a table entry at 206 or 208, the entire memory has been inspected (the xe2x80x98yesxe2x80x99 prong at 210), processing terminates (at 212). If, after creating a table entry at 206 or 208, the entire memory has not been inspected (the xe2x80x98noxe2x80x99 prong at 210), processing continues at 202. During subsequent operations, interface 106 may read information from and write information to memory 102 while skipping those blocks identified in the table as invalid. A table created in accordance with FIG. 1 may be generated upon system 100 power-up/reset, or once during the manufacture and testing process. Further, the table may be stored in volatile memory such as RAM or nonvolatile memory such as programmable read only memory (PROM), electrically erasable programmable read only memory (EEPROM), or FLASH type memory.
In another prior art technique, interface 106 may write a pattern to memory 102 indicating whether a block is valid/functional or invalid/nonfunctional. Referring to FIG. 3, interface 106 may write a known pattern (e.g., the zero value) to every location in memory 102 (at 300). Memory 102 may then be read back a block at a time (at 302) and inspected (at 304). If every location retrieved at 302 reflects the pattern written at 300 (the xe2x80x98yesxe2x80x99 prong at 304), each location in that block of memory is written with a specified pattern indicating it as valid memory (at 306). If every location retrieved at 302 does not match the pattern written at 300 (the xe2x80x98noxe2x80x99 prong at 304), each location in that block of memory is written with a specified pattern indicating it as invalid memory (at 308). If, after storing a pattern to memory at 306 or 308, the entire memory has been inspected (the xe2x80x98yesxe2x80x99 prong at 310), processing terminates (at 312). If, after storing a pattern to memory at 306 or 308, the entire memory has not been inspected (the xe2x80x98noxe2x80x99 prong at 310), processing continues at 302. During subsequent operations, interface 106 may read information from and write information to memory 102 by skipping over those blocks marked as invalid.
Current techniques to incorporate partially dysfunctional memory devices into a system include or exclude entire blocks of memory. Because the cost of memory is becoming increasingly important in driving the cost of finished products such as telephone answering machines, video storage devices, and toys, it would be beneficial to provide a mechanism that allows more of a partially dysfunctional memory device to be used.
In one embodiment, the invention provides a method to demarcate regions of dysfunctional storage locations in a memory device. The method includes identifying a first and a second dysfunctional storage location in the memory device, and storing a first tag before the first storage location, the first tag indicating a storage location immediately after the second storage location.
In another embodiment, the invention also provides a method to demarcate functional regions of storage locations by identifying a functional storage location, and storing a second tag at the identified functional storage location, the second tag indicating a storage location immediately preceding the first identified dysfunctional storage location.
Methods in accordance with the invention may be stored in any media that is readable and executable by a programmable control device such as, for example, a microprocessor or custom designed state machine.